1. Field of the Invention
This invention is related to the field of processors and, more particularly, to handling store memory operations in processors.
2. Description of the Related Art
Processors generally include support for load and store memory operations to facilitate transfer of data between the processors and memory to which the processors may be coupled. A load memory operation (or, more briefly, a load) is a memory operation specifying a transfer of data from a main memory to the processor (although the transfer may be completed in cache). A store memory operation (or, more briefly, a store) is a memory operation specifying a transfer of data from the processor to memory. Loads and stores may be an implicit part of an instruction which includes a memory operation, or may be explicit instructions.
Stores are often executed and placed in a queue within a load/store unit to await non-speculative status. Once a store is non-speculative, the corresponding store data can be committed to memory (in cache or in the main memory system) and then the store can be retired. Typically, store data can be forwarded from the queue for subsequent loads that access one or more bytes updated by the store. Accordingly, committing the store data to memory and retiring the store operations are typically given a low priority in the processor. In many cases, the store may become the oldest operation outstanding in the processor before retiring.
Unfortunately, the low priority for committing store data can impact the performance of the processor. For example, processors typically retire instructions in program order. Accordingly, if a store has not been retired, younger instructions (according to the program order) also cannot be retired. Buffering for such instructions and/or their results may fill, which may cause stalls in instruction execution until the buffering can be reduced from full status. An instruction is younger than another instruction if it is subsequent to the other instruction in program order. An instruction is older than another instruction if the instruction is prior to the other instruction in program order. Similarly, instructions may be indicated as being prior to or subsequent to other instructions, or may be referred to as previous instructions, preceding instructions, subsequent instructions, etc. Such references may refer to the program order of the instructions. The program order at any given point in time may be a predicted order (e.g. via branch prediction schemes).